1. Field of the Invention
The invention relates to the field of high-speed differential-logic circuits and in particular to a differential-logic, ring oscillator having a plurality of quadrature outputs.
2. Description of the Prior Art
Ring oscillators are well known and are comprised of a plurality of inverters coupled in a cascaded series with the output of the cascade fed back to the input for the first inverter stage in the cascade. Given enough inverter stages, typically five or more, the ring oscillator will oscillate at a natural or characteristic frequency largely defined by the switching delays of each of the inverter stages.
The use of differential circuitry is also known in logic circuits. In differential-logic circuits, instead of driving the logic lines to a logical high or low voltage state, a pair of logic lines is provided for each bit. Logic voltage levels on the two lines are inverted or logically complementary. When the bit represented by the pair lines is to change state, the voltage polarity of the pair of lines switches. The transition between the pair of lines is detected to signify the change in the logic level.
Voltage controlled oscillators (VCO'S) are also well known and used in communication circuits as well as a large variety of other applications. VCO's with quadrature outputs are particularly important in communication circuits, such as a binary phase shift keyed (BPSK) demodulator, quadricorrelator frequency discriminator, and high-speed clock recovery circuits.
Extremely high speeds are very important in a fully integrated, fiber optic receiver where the data rates typically are set at 500 megabits/s. Typically, in prior art circuits, the maximum VCO oscillating frequency of the clock recovery circuit will often limit the maximum available data rate in a fiber optic receiver. Some problems with the limited VCO speeds have been circumvented for data rates above 2.5 Gbits/s by the use of surface acoustic wave (SAW) filters. The surface acoustic wave filter extracts the clock signal after a nonlinear operation has been performed on the data. However, such SAW filters are typically bulky hybrid receivers having numerous difficulties relating to interconnections and temperature stability.
For a fully integrated high-speed receiver, the prior art has devised high-speed VCO'S for the clock recovery phase-locked loop as distributed or lumped resonant type oscillators with a frequency maximum that can approach the theoretical maximum frequency of the devise. However, these types of oscillators require precision inductors and transmission lines to be fabricated on chip. Furthermore, the tuning range of such VCO'S is usually small.
In contrast, conventional digital output oscillators, such as ring oscillators or a multivibrators, are very simple to design and are characterized by a large tuning range. However, these conventional ring oscillators and multivibrators are typically limited to a maximum frequency of approximately 1/10 the maximum switching frequency of the devices of which they are built.
What is needed then is a topology for high-speed digital output VCO with both in-phase and quadrature outputs which would have a frequency of utility for clock recovery in multi Gbit/s fiber optic data links. Although the illustrated embodiment is described with this specific application in mind, it is expressly contemplated that any application where quadrature signals are needed or can be advantageously employed is also included within the scope of the invention.